Q. What is inheritance in Java? Ans. Inheritance is when a class inherits the properties of another class. The class which inherits is called the child class and the class from which the properties are inherited is called the parent…
Blocking (immediate) and Non-Blocking (deferred) Assignments in Verilog
There are Two types of Procedural Assignments in Verilog. Blocking Assignments Nonblocking Assignments To learn more about Delay: Read Delay in Assignment (#) in Verilog Blocking assignments Blocking assignments (=) are done sequentially in the order the statements are written. A second…
Delay in Assignment (#) in Verilog
Syntax: #delay It delays execution for a specific amount of time, ‘delay’. There are two types of delay assignments in Verilog: Delayed assignment: #Δt variable = expression; // “expression” gets evaluated after the time delay Δt and assigned to the “variable” immediately Intra-assignment…
PMOS is no longer the Culprit
MOS scaling has introduced many undesired effects, known second order ones being channel length modulation, velocity saturation, mobility degradation etc. These are introducing a new set of challenges for the designers. From the performance perspective, supply voltage scaling has reduced…
Synthesis and Functioning of Blocking and Non-Blocking Assignments.
Here are some examples on blocking and non-blocking assignments in Verilog, that can be really useful for the budding design Engineers. First let us discuss the features of these assignments. They are procedural assignments always used in a procedural block…
Interview Experience – Si2Chip – Memory Design
I want to share my interview experience in Si2Chip, a design and layout based service company in Bangalore. I applied though the career section of the company and got the call for the Memory Design requirement. There were two telephonic…
FPGA vs. Microcontroller
FPGA stands for Field Programmable Gate Array. They are programmable integrated circuits made up of a large number configurable logic blocks (CLBs), fixed function blocks and memory blocks which can be used to perform complex digital computations. The CLBs are…
Digital Design Methodologies
There are two basic types of digital design methodologies: top-down design methodology bottom-up design methodology. top-down Design Methodology In a top-down design methodology, we define the top-level block and identify the sub-blocks necessary to build the top-level block. We further…
Why VLSI?
“There is Plenty of Room at the Bottom“ A popular talk delivered by Richard Feynman to American Physical Society at California Institute of Technology in the year of 1959. This talk at that time could foresee the possibility of the…
Port Mapping for Module Instantiation in Verilog
Port mapping in module instantiation can be done in two different ways: Port mapping by order Port mapping by name In this post, we would take one example to understand both types of port mapping in detail. The above Figure shows…