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VLSI Design Flow

Posted on November 20, 2017June 17, 2025 By Pravriti 1 Comment on VLSI Design Flow

The chip design includes different types of processing steps to finish the entire flow. For each and every step, the design process requires a dedicated EDA tool. These tools have the flexibility to import or export different types of files.

The picture below shows the various steps of the design flow:

VLSI Design Flow

Here is a brief description of each step:

  1. SPECIFICATION: This is the crucial step as it will decide the future of the product. Lots of activity goes on to gather the market requirement. One may take feedback from potential customers on what they are looking for or what the expectations are. Once this done, the specification sheet along with finer technical details are shared to next team.
  2. ARCHITECTURE: Now this is the step where main work starts. With the help of specification, design engineers decide the architecture and a layout is created for the IC using EDA tools.
  3. RTL CODING: RTL is an acronym for register transfer level. This is where the detailed system specifications is converted into VHDL or Verilog language (Hardware Description Language) showing how data is transferred from register to register. This also goes through functional verification process in next step.
  4. RTL VERIFICATION: Register Transfer level is one of the important step which ensures that the design is logically correct without major timing errors. It is very advantageous to perform this step at early stage. A testbench file may be used to verify the design using EDA tools.
  5. SYNTHESIS: In this process RTL is transferred to netlist (gate level netlist). This is done with the help of FPGA/CPLD/ASIC hardware tools. These target boards may be accessed using IDE’s provided by different vendors.
  6. GATE-LEVEL SIMULATION: The verification of gate level simulation of the logic generated is very important. In this step various kinds of checks are included like: functionality check, timing check and physical analysis check.
  7. BACK-END: Here the final design after synthesis is given to the IC manufacturer.
  8. TAPE-OUT: It is the process under back-end only where the final result of FRONT-END is provided to the manufacturer in form of photomask. Then the manufacturer performs wafer processing, packaging, testing, and delivery of samples to test the physical IC.
  9. TO FOUNDRY: once the samples are tested and verified, then the design is sent for mass production.

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DHD Tags:Design Flow, HDL, RTL, Synthesis, Tape-out

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Comment (1) on “VLSI Design Flow”

  1. dithi says:
    November 18, 2019 at 12:40 pm

    Thanks for sharing

    Reply

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