Category: VLSI Technology

Checking ERC (Well Check)

This process checks the connection of the n-well and p-substrate. The C5 process used here is an n-well process. The p-type substrate is common to all NMOS devices and should be grounded. One of the electrical rule checks (ERCs) is…

Layout vs. Schematic (LVS)

Layout vs. Schematic (LVS) in Electric is checked using Network Consistency Checking (NCC) To check this, execute Tools –> NCC –> Schematic and Layout views of Cell in Current Window. You can run this command being in any design window (schematic…

Key Binding in Electric

Key Binding binds a key; when pressed will execute a command from the menu to which it is bound. You can bind a key to a command as below: Go to File -> Preferences –> Categories –> General –> Key…

Creating Resistor Layout

Create a new cell as in case of schematic earlier with the view as {layout} and with the same cell name Resistive_divider. Now under the library design_1.jelib you can find a layout cell named as Resistive_divider {lay} with an yellow indicator as…

Creating Resistor Schematic

1. Let’s create a Library Go to Explorer (beside the Components view); you will find LIBRARIES name as noname File –> Save Library As Go to the location where you want to save your design (eg: $PATH/Electric/Designs) Name the design (library…

Starting and Setting-up Electric

1. Start Electric: You will see the following window. 2. Towards the bottom of the window, you will find an Electric Messages Window where you can find different messages throughout any design. 3. You can change the background color of the window…

Getting Started with Electric

Installation Steps: Ensure Java is installed and updated on your system Download and save electric-9.07.jar to your computer (It is a java archived file) – You just have to double-click this .jar file and there you go. If java is…