Category: VLSI Technology

The Mystery of Monte Carlo Simulation

If you are in VLSI industry, sometime or the other, you must have heard this term “Mont Carlo (MC)”. In this post let us understand the literal meaning of Monte Carlo simulation and its application in circuit design field. Going by…

VLSI Transistor Basics Interview Question Bank-1

This part of the Interview Question Bank deals with the general transistor level questions asked in various VLSI companies Q1. If you connect the input of an inverter to its output where will the output gets settled? Ans. The output…

180 nm, 90 nm, 45 nm…- What’s the difference?

Many of you might have worked on different VLSI technology nodes such as 180 nm, 90 nm, 45 nm etc. in circuit simulation tools like Cadence etc. With the invention and evolution of transistors, various technologies came into existence and…

SETUP Time and SETUP Violation in a Single D Latch

Setup and Hold time concept is one of the fundamental concepts that is very necessary for closing and analysing and timing margin. The analysis in digital domain, in Reg to Reg system is very popular but the root cause of…

PMOS is no longer the Culprit

MOS scaling has introduced many undesired effects, known second order ones being channel length modulation, velocity saturation, mobility degradation etc. These are introducing a new set of challenges for the designers. From the performance perspective, supply voltage scaling has reduced…

Synthesis and Functioning of Blocking and Non-Blocking Assignments.

Here are some examples on blocking and non-blocking assignments in Verilog, that can be really useful for the budding design Engineers. First let us discuss the features of these assignments. They are procedural assignments always used in a procedural block…

Why VLSI?

“There is Plenty of Room at the Bottom“ A popular talk delivered by Richard Feynman to American Physical Society at California Institute of Technology in the year of 1959. This talk at that time could foresee the possibility of the…

NAND and NOR gate using CMOS Technology

For the design of any circuit with the CMOS technology; We need parallel or series connections of nMOS and pMOS with a nMOS source tied directly or indirectly to ground and a pMOS source tied directly or indirectly to Vdd.…