Category: Digital Electronics

Step by Step Method to Design a Combinational Circuit

The Electronics engineers should know the steps to design a particular circuit. While we study, we directly study the properties of the electronic block and the circuit diagram of the corresponding block. We never think how had we landed up to that…

SETUP Time and SETUP Violation in a Single D Latch

Setup and Hold time concept is one of the fundamental concepts that is very necessary for closing and analysing and timing margin. The analysis in digital domain, in Reg to Reg system is very popular but the root cause of…

Synthesis and Functioning of Blocking and Non-Blocking Assignments.

Here are some examples on blocking and non-blocking assignments in Verilog, that can be really useful for the budding design Engineers. First let us discuss the features of these assignments. They are procedural assignments always used in a procedural block…

Digital Design Methodologies

—There are two basic types of digital design methodologies: top-down design methodology bottom-up design methodology. top-down Design Methodology —In a top-down design methodology, we define the top-level block and identify the sub-blocks necessary to build the top-level block. We further…

State Equivalence & Minimization Part – 2

The states which are equivalent, are redundant. Because by looking at the output, we can not even figure out in which state the machine is in. So, if there are two equivalent states then there is no point of using…

State Equivalence & Minimization Part – 1

Sometimes a state diagram constructed for a finite state machine contains redundant states, i.e. states whose function can be accomplished by other states. The number of memory elements required for the realization of a machine is directly related to the…

Circuit Design of Parity Generator

This post illustrates the circuit design of Even Parity Generator. State Machine diagram for the same Parity Generator has been shown below. Click here to realize how we reach to the following state transition diagram. Click here to learn the step…

State Machine Diagram for Parity Generator

Parity generator can be of two types: (i) Even Parity Generator (ii) Odd Parity Generator In this post we will derive the state machine for an even parity generator. Consider input “I” is a stream of binary bits. When an…

Circuit Design of a Sequence Detector

This post illustrates the circuit design of Sequence Detector for the pattern “1101”. State Machine diagram for the same Sequence Detector has been shown below. Click here to realize how we reach to the following state transition diagram. Click here to…

State Machine Diagram for Pattern Recognition / Sequence Detector

Sequence Detector is a digital system which can detect/recognize a specified pattern from a stream of input bits. Let’s say the Sequence Detector is designed to recognize a pattern “1101”. Consider input “X” is a stream of binary bits. When…