Category: DHD

Digital Hardware Design

Delay in Assignment (#) in Verilog

Syntax: #delay It delays execution for a specific amount of time, ‘delay’. There are two types of delay assignments in Verilog: Delayed assignment: #Δt variable = expression; // “expression” gets evaluated after the time delay Δt and assigned to the “variable” immediately Intra-assignment…

FPGA vs. Microcontroller

FPGA stands for Field Programmable Gate Array. They are programmable integrated circuits made up of a large number configurable logic blocks (CLBs), fixed function blocks and memory blocks which can be used to perform complex digital computations. The CLBs are…

Digital Design Methodologies

—There are two basic types of digital design methodologies: top-down design methodology bottom-up design methodology. top-down Design Methodology —In a top-down design methodology, we define the top-level block and identify the sub-blocks necessary to build the top-level block. We further…